Protection circuit for MOS components

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S355000, C257S630000, C257S356000, C257S529000, C257S528000, C257S532000, C324S750010, C455S083000, C363S126000, C333S104000, C330S310000

Reexamination Certificate

active

06882014

ABSTRACT:
A protection circuit for MOS components. In the protection circuit, a bypass PMOS transistor has a gate, a source and a substrate, all coupled to a first voltage node and a drain coupled to a gate of a MOS component. A bypass NMOS transistor has a gate, a source and a substrate, all coupled to a second voltage node and a drain coupled to the gate of the MOS component. When positive charges are accumulated on the gate of the MOS component due to an antenna effect, the bypass PMOS transistor dissipates the positive charges to the first voltage node. On the contrary, when negative charges are accumulated on the gate of the MOS component due to antenna effect, the bypass NMOS transistor dissipates the negative charges to the second voltage node.

REFERENCES:
patent: 4929887 (1990-05-01), Robitaille et al.
patent: 6537883 (2003-03-01), Chen et al.
patent: 20020153593 (2002-10-01), Chen et al.

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