Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-06-07
2011-06-07
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S135000, C711SE12001
Reexamination Certificate
active
07958320
ABSTRACT:
Embodiments of the present invention provide a secure programming paradigm, and a protected cache that enable a processor to handle secret/private information while preventing, at the hardware level, malicious applications from accessing this information by circumventing the other protection mechanisms. A protected cache may be used as a building block to enhance the security of applications trying to create, manage and protect secure data. Other embodiments are described and claimed.
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U.S. Patent and Trademark Office, Final Office Action mailed Jan. 19, 2011 with Reply to Final filed Mar. 10, 2011 in U.S. Appl. No. 11/823,325.
Gueron Shay
Raikin Shlomo
Sheaffer Gad
Bataille Pierre-Michel
Intel Corporation
Trop Pruner & Hu P.C.
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