Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2005-05-31
2005-05-31
Nguyen, Van Thu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S189090, C327S512000, C327S513000
Reexamination Certificate
active
06901022
ABSTRACT:
A biasing circuit comprising a first circuit and a second circuit. The first circuit may be configured to generate a first bias signal and a second bias signal. The second bias signal may be defined by a threshold voltage and a first resistance. The second circuit may be configured to generate a third bias signal in response to the first and the second bias signals and a second resistance. The third bias signal may have a magnitude that is linearly proportional to absolute temperature (PTAT) and be configured to vary a refresh rate of a memory cell in response to changes in temperature.
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Christopher P. Maiorana P.C.
Cypress Semiconductor Corp.
Nguyen Van Thu
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