Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Parameter related to the reproduction or fidelity of a...
Reexamination Certificate
2003-08-22
2004-12-07
Zarneke, David (Department: 2829)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Parameter related to the reproduction or fidelity of a...
Reexamination Certificate
active
06828799
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a propagation delay time measuring method and a testing apparatus.
2. Related Art
A semiconductor testing apparatus is electrically connected with a device under test by a path which transfers a test signal output of a driver, and it is essential to measure the propagation delay time of the path correctly in order to test the semiconductor testing apparatus accurately. The Japanese Patent Application Laid-Open No.1996-36037 (Application date Feb. 6, 1996) discloses a delay time measuring circuit which measures a propagation delay time of the path which connects the semiconductor testing apparatus and the device under test, by connecting a grounded device, instead of the device under test, to an end of the path, and by receiving at a comparator both the test signal output of the driver and the test signal output of the driver and then reflected at the grounding point.
In recent years, with accelerating of the semiconductor testing apparatus, it is necessary to test the semiconductor testing apparatus accurately and it is also necessary to calibrate accurately the semiconductor testing apparatus. Therefore, there has been a known problem that a rise/fall characteristic of test signals of the driver, the comparator, etc affects the accuracy of the measurement when calibrating the semiconductor testing apparatus.
Alternatively, the delay time measuring circuit disclosed by the Japanese Patent Application Laid-Open No.1996-36037 has a problem that when measuring the propagation delay time, a measurement error of the propagation delay time occurs by a rise/fall characteristic of the comparator, because the delay time measuring circuit detects both a rise edge of the test signal output of the driver, and a fall edge of the test signal output of the driver reflected at the grounding point.
Accordingly, it is an object of the present invention to solve the foregoing problem.
SUMMARY OF THE INVENTION
In order to achieve these desired objectives, according to the first aspect of the present invention, a propagation delay time measuring method of measuring a propagation delay time of a test signal propagating along one of a first signal path and a second signal path serially connecting to the first signal path through which a semiconductor testing apparatus includes a driver and a comparator electrically connected to a device under test device under test, includes: a first connecting step of connecting an end of the first path to the driver and the comparator; a first output step of outputting a test signal from the driver to the first path; a first reflect signal receiving step of receiving a test signal at the comparator, as a first reflect signal, reflected at another end of the first path; a first timing detecting step of detecting a timing, defined as a first timing, when the first reflect signal obtained by the comparator reaches a predetermined level; a second connecting step of connecting an end of the second path to another end of the first path; a second output step of outputting the test signal from the driver to the second path; a second reflect signal receiving step of receiving a test signal at the comparator, defined as a second reflect signal, reflected at another end of the second path; a second timing detecting step of detecting a timing, defined as a second timing, when the second reflect signal obtained by the comparator reaches the predetermined level; and a delay time calculation step of calculating of the propagation delay time of the second path, based on the reference timing corresponding to a timing when the delay time calculator outputs the test signal, the first timing, and the second timing.
The first connecting step may include a first grounding step of grounding another end of first path and the second connecting step may include a second grounding step of grounding another end of the second path.
The first timing detecting step may include a step of detecting the first timing when a rise edge of the first reflect signal reaches the predetermined level and the second timing detecting step may include a step of detecting the second timing when a rise edge of the second reflect signal reaches the predetermined level.
The first timing detecting step may include a step of detecting the first timing when a fall edge of the first reflect signal reaches the predetermined level and the second timing detecting step may include a step of detecting the second timing when a fall edge of the second reflect signal reaches the predetermined level.
The reference timing is defined as a timing when the driver outputs the test signal and the delay time calculation step may include a step of calculating the propagation delay time, based on a first timing interval which is defined as a interval from the reference timing to the first timing, and a second timing interval which is defined as a interval from the reference timing to the second timing.
The propagation delay time measuring method in the first aspect may further include a repetition step of repeatedly repeating the first output step, the first reflect signal output step, and a step of supplying the test signal to the driver from the comparator, based on a signal output of the comparator corresponding to the obtained first reflect signal, and the delay time calculation step may further include a step of calculating the first timing interval based on a repeating period of the repetition step.
The propagation delay time measuring method in the first aspect may further include an another repetition step of repeatedly repeating the second output step, the second reflect signal output step, and a step of supplying the test signal to the driver from the comparator, based on a signal output of the comparator corresponding to the obtained second reflect signal, and the delay time calculation step may further include a step of calculating the second timing interval based on a repeating period of the another repetition step.
According to the second aspect of the present invention, a semiconductor testing apparatus for supplying a test signal to semiconductor devices so as to test the semiconductor devices includes: a driver which outputs the test signal; a comparator which receives the test signal; a first path of which an end is connected to the driver and the comparator; a second path of which an end is connected to another end of the first path and of which another end is connected to a device under test; a delay time calculator which calculate a propagation delay time of the second path, based on a timing, defined as a first reflect signal which is output from the driver and reflected at the end of another end of the first path, when the first reflect signal reaches a predetermined level, and based on a timing, defined as a first reflect signal which is output from the driver and reflected at the end of another end of the second path, when the second reflect signal reaches a predetermined level.
REFERENCES:
patent: 5703489 (1997-12-01), Kuroe
patent: 5867030 (1999-02-01), Sato
patent: 6269051 (2001-07-01), Funaba et al.
patent: 6356096 (2002-03-01), Takagi et al.
patent: 6479983 (2002-11-01), Ebiya
patent: 6549000 (2003-04-01), Ebiya
patent: 6556934 (2003-04-01), Higashide
patent: 2003/0125897 (2003-07-01), Higashide
patent: 8-36037 (1996-02-01), None
patent: 2000-9801 (2000-01-01), None
patent: 2000-352578 (2000-12-01), None
Translation of International Preliminary Examination Report issued in PCT/JP02/01790 mailed Apr. 2, 2003, 4 pgs.
Patent Abstracts of Japan, Publication No. 2000-352578, Dec. 19, 2000, 1 pg.
Patent Abstracts of Japan, Publication No. 2000-009801, Jan. 14, 2000, 1 pg.
Patent Abstracts of Japan, Publication No. 08-036037, Feb. 6, 1996, 1 pg.
International Search Report issued in PCT/JP02/01790 mailed May 21, 2002, 2 pgs.
International Preliminary Examination Report issued in PCT/JP02/01790 mailed Apr. 2, 2003, 4 pgs.
Higashide Koichi
Higashide Satoko
Ishigaki Yukio
Advantest Corporation
Higashide Satoko
Hollington Jermele
Osha & May L.L.P.
Zarneke David
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