Programming of multi-level memory cells on a continuous word...

Details Programming of multi-level memory cells on a continuous word... Programming of multi-level memory cells on a continuous word...

2006-11-21

2006-11-21

Phan, Trong (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S185220, C365S185240

Reexamination Certificate

active

07139192

ABSTRACT:
Write operations that simultaneously program multiple memory cells on the same word line in an MBPC or MLC non-volatile memory employ word line voltage variation, programming pulse width variation, and column line voltage variation to achieve uniform programming accuracy across a range of target threshold voltages. One type of write operation reaches target threshold voltages during respective time intervals and in each time interval uses programming parameters that optimize threshold voltage resolution for the target threshold voltage corresponding to that interval. During or at the end of write operations or the ends of each interval, remedial programming sequences can adjust the threshold voltages of memory cells that program slowly.

REFERENCES:
patent: 5596527 (1997-01-01), Tomioka et al.
patent: 5751635 (1998-05-01), Wong et al.
patent: 6104636 (2000-08-01), Tada
patent: 6259627 (2001-07-01), Wong

Affiliated with

Also associated with

Rating

Programming of multi-level memory cells on a continuous word... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Programming of multi-level memory cells on a continuous word..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programming of multi-level memory cells on a continuous word... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3700967