Programming management data for NAND memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

07861139

ABSTRACT:
Methods, apparatus, systems, and data structures may operate to generate or store error correction data for each of a plurality of sectors of a page except for a particular sector in the page and combining a block management data with the particular sector to generate a modified sector. Additionally, various methods, apparatus, systems, and data structures may operate to generate or store error correction data for the modified sector and combining the plurality of sectors, the error correction data for each of the plurality of sectors other than the particular page, and the block management data and the error correction data for the modified sector.

REFERENCES:
patent: 6119259 (2000-09-01), Jeong
patent: 6539512 (2003-03-01), Jeong et al.
patent: 2004/0083334 (2004-04-01), Chang et al.
patent: 2005/0055610 (2005-03-01), Sassa et al.
patent: 2007/0113154 (2007-05-01), Kojima

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Programming management data for NAND memories does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Programming management data for NAND memories, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programming management data for NAND memories will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4165912

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.