Static information storage and retrieval – Read/write circuit – Including signal comparison
Reexamination Certificate
2000-04-25
2001-10-09
Nelms, David (Department: 2818)
Static information storage and retrieval
Read/write circuit
Including signal comparison
C365S185030, C365S185330
Reexamination Certificate
active
06301161
ABSTRACT:
BACKGROUND
1. Field of the Invention
This invention relates to analog storage. In particular, the invention relates to analog non-volatile flash memory.
2. Description of Related Art
Analog storage has been used in a number of recording and playback applications. For example, U.S. Pat. No. 5,220,531 issued to Blyth and Simko describes an analog storage scheme using electrically erasable programmable read only memory (EEPROM). Such an analog storage typically has memory cells using floating gate technology. A memory cell of a floating gate device has a source, a drain, a gate, and a floating gate. The threshold between the gate and the source is determined or controlled by the charge on the floating gate. These memory cells are erased using Fowler-Nordheim tunneling by applying a high voltage, e.g., 21 Volts, on the gate, zero volt on the source, and zero volt on the drain. The memory cells are programmed using the same Fowler-Nordheim tunneling mechanism by applying a high voltage (e.g., 9 to 19 volts) on the drain, zero volts on the gate, and 6 volts on the source.
Existing techniques for programming analog storage cells have a number of drawbacks. First, the programming is slow because the iterative sequence uses constant program pulses having constant programming voltage. To achieve high accuracy, the programming voltage step size has to be sufficiently small. Iterative programming the memory cells using small programming voltage step size requires a large number of steps, resulting in slow programming time. Second, the programming is used for EEPROM memory cells, and therefore is not applicable for flash memory cells which have different programming requirements.
Therefore, there is a need to have an efficient and accurate technique to program flash memory cells.
SUMMARY
The present invention is a method and apparatus to program a flash memory cell in an analog storage array. A read circuit reads a cell voltage of a flash memory cell. A comparator compares the read cell voltage with an input voltage representing an analog signal. The comparator generates first and second comparison results. A programming circuit generates a first program pulse corresponding to a first amplitude to iteratively program the flash memory cell based on the first comparison result. The programming circuit generates a second program pulse corresponding to a second amplitude less than the first amplitude to iteratively program the flash memory cell based on the first and second comparison results.
In one embodiment, a counter determines number of program pulses applied to the flash memory cell. The programming circuit terminates programming the flash memory cell when the number of program pulses reaches a predetermined maximum count. The first comparison result indicates if the read cell voltage is greater than the input voltage by a predetermined amount. The second comparison result indicates if the read cell voltage is greater than the input voltage. The programming circuit terminates programming the flash memory cell when the read cell voltage is less than the input voltage according to the second comparison result.
REFERENCES:
patent: 5220531 (1993-06-01), Blyth et al.
patent: 5623436 (1997-04-01), Sowards et al.
patent: 5764571 (1998-06-01), Banks
patent: 5903487 (1999-05-01), Wu et al.
Brennan, Jr. James
Holzmann Peter J.
Kordesch Albert
Blakely , Sokoloff, Taylor & Zafman LLP
Lam David
Nelms David
Winbond Electronics Corporation
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