Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
1999-09-29
2001-01-23
Wong, Peter S. (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S349000
Reexamination Certificate
active
06177785
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an integrated circuit voltage regulator and, more particularly, to a voltage regulator circuit for generating programmable output voltage and having a low power consumption feature.
DESCRIPTION OF THE RELATED ART
A voltage regulator is a circuit for providing a constant direct current (DC) voltage independent of variations of peripheral factors, such as input supply voltage, load current, and temperature. A typical voltage regulator reduces variations of the output voltage to a range much smaller than those of input supply voltage, thereby minimizing variations of total bias current against bias voltage.
It is well known that an unregulated voltage provided by a conventional voltage regulator is not sufficient for applying to many electronic circuits. The reasons are, for example, that the unregulated output voltage is not constant as load current varies, that the unregulated output voltage varies with variations of the input supply voltage, and that the unregulated output voltage varies with variations of temperature because semiconductor devices used in electronic circuits are affected by temperature.
Accordingly, an output voltage of a voltage regulator is required to remain as constant as possible under the changes of external factors, such as input supply voltage, load current, and temperature.
Examples of contemporary voltage regulators are disclosed, for example, in U.S. Pat. No. 5,453,678 for Programmable Output Voltage Regulator issued to Bertolini et al., U.S. Pat. No. 5,467,010 for Voltage Regulator Control Circuit issued to Quarmby et al., U.S. Pat. No. 5,648,718 for Voltage Regulator With Load Pole Stabilization issued to Edwards, U.S. Pat. No. 5,672,959 for Low Drop-Out Voltage Regulator Having High Ripple Rejection And Low Power Consumption issued to Der, U.S. Pat. No. 5,717,319 for Method And Reduce The Power Consumption Of An Electronic Device Comprising A voltage Regulator issued to Jokinen, U.S. Pat. No. 5,825,169 for Dynamically Biased Current Gain Voltage Regulator With Low Quiescent Power Consumption issued to Selander et al., U.S. Pat. No. 5,852,359 for Voltage Regulator With Load Pole Stabilization issued to Callahan, Jr. et al., and U.S. Pat. No. 5,864,226 for Low Voltage Regulator Having Power Down Switch issued to Wang et al., whose disclosures are herein incorporated by reference.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a programmable voltage regulator circuit for regulating its output voltage selectively with respect to more than one voltage.
It is another object of the present invention to provide a voltage regulator circuit with a power saving feature.
It is yet another object of the present invention to provide a voltage regulator circuit with low output impedance.
It is yet another object of the present invention to provide a voltage regulator circuit having a structure suitable for integration.
The present invention encompasses a voltage regulator for generating a regulated output voltage within a predetermined scope by using a power supply voltage. In brief, a voltage regulator of the present invention comprises a programmable reference generator, a programmable output adjustor, an error amplifier, and an output driver. The programmable reference generator is responsive to a first programming signal applied externally and generates a reference voltage corresponding to the first programming signal by using the power supply voltage. The programmable output adjustor is responsive to a second programming signal applied externally and generates an output adjust voltage corresponding to the second programming signal by using the regulated output voltage. The error amplifier generates an error voltage corresponding to a difference between the reference voltage and the output adjust voltage. The output driver drives the regulated output voltage in response to the error voltage.
According to a preferred aspect of the invention, the programmable reference generator, the programmable output adjustor and the error amplifier each is disabled in response to a power saving control signal applied externally. The output driver is also disabled in response to an output enable control signal applied externally. The programmable reference generator, the programmable output adjustor, the error amplifier, and the output driver do not consume power when they are disabled. In an embodiment, the programmable reference generator, the programmable output adjustor, the error amplifier and the output driver may preferably be integrated into a single semiconductor chip.
The programmable reference generator of the invention includes a variable resistance circuit for providing a variable resistance in response to the first programming signal, and a bandgap reference circuit for generating the reference voltage based on the variable resistance. The first and second programming signals may preferably be digital signals. The variable resistance circuit includes a decoder for providing a plurality of first decoding signals by decoding the first programming signal, a resistor array having a plurality of serially-connected resistors, and a switch circuit for varying resistance of the resistor array in response to the first decoding signals. The bandgap reference circuit includes a bias voltage generator for generating a bias voltage. The error amplifier is biased by the bias voltage. The bias voltage generator includes a cascode current source having a plurality of current mirrors serially connected between the power supply voltage and the variable resistance circuit. The cascode current source is disabled in response to the power saving control signal.
The programmable output adjustor includes a decoder for providing a plurality of second decoding signals by decoding the second programming signal, and an adjust voltage generator for varying the output adjust voltage in response to the second decoding signals. The adjust voltage generator includes a variable voltage divider responsive to the second decoding signals. The variable voltage divider includes a capacitor array having a plurality of capacitors, and switch circuits for varying capacitance of the capacitor array in response to the second decoding signals.
According to another aspect of the invention, the programmable reference generator, the programmable output adjustor, and the error amplifier each is switched on and off in response to a power saving control pulse signal. The output driver is also switched on and off in response to an output enable control pulse signal. The programmable output adjustor, the error amplifier, and the output driver do not consume power when off. Each of the power saving control pulse signal and the output enable control pulse signal has a variable duty cycle. The duty cycle of the output enable control pulse signal varies relative to the duty cycle of the power saving control pulse signal.
According to still another preferred aspect of the invention, the voltage regulator includes a standalone type capacitor that is coupled between the regulated output voltage and a ground voltage. An appropriate capacitance value of the standalone type capacitor is preferably determined by a load coupled to the regulated output voltage.
REFERENCES:
patent: 4622512 (1986-11-01), Brokaw
patent: 4810948 (1989-03-01), Takuma
patent: 5229710 (1993-07-01), Kraus et al.
patent: 5453678 (1995-09-01), Bertolini et al.
patent: 5467010 (1995-11-01), Quarmby et al.
patent: 5546042 (1996-08-01), Tedrow et al.
patent: 5559425 (1996-09-01), Allman
patent: 5568045 (1996-10-01), Koazechi
patent: 5648718 (1997-07-01), Edwards
patent: 5672959 (1997-09-01), Der
patent: 5717319 (1998-02-01), Jokinen
patent: 5811993 (1998-09-01), Dennard et al.
patent: 5825169 (1998-10-01), Selander et al.
patent: 5834926 (1998-11-01), Kadanka
patent: 5852359 (1998-12-01), Callahan, Jr. et al.
patent: 5864226 (1999-01-01), Wang et al.
patent: 5900772 (1999-05-01), Somerville et al.
patent: 5943635 (1999-08-01), Inn
F. Chau & Associates LLP
Laxton Gary L.
Samsung Electronics Co,. Ltd.
Wong Peter S.
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