Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2011-07-12
2011-07-12
Tran, Minh-Loan T (Department: 2826)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C257S004000, C257SE45002
Reexamination Certificate
active
07977203
ABSTRACT:
Programmable via devices and methods for the fabrication thereof are provided. In one aspect, a programmable via device is provided. The programmable via device includes a first dielectric layer; a heater over the first dielectric layer; an air gap separating at least a portion of the heater from the first dielectric layer; an isolation layer over the first dielectric layer covering at least a portion of the heater; a capping layer over a side of the isolation layer opposite the first dielectric layer; at least one programmable via extending through the capping layer and at least a portion of the isolation layer and in contact with the heater, the programmable via including at least one phase change material; a conductive cap over the programmable via; a second dielectric layer over a side of the capping layer opposite the isolation layer; a first conductive via and a second conductive via, each extending through the second dielectric layer, the capping layer and at least a portion of the isolation layer and in contact with the heater; and a third conductive via extending through the second dielectric layer and in contact with the conductive cap.
REFERENCES:
patent: 6795338 (2004-09-01), Parkinson et al.
patent: 6839263 (2005-01-01), Fricke et al.
patent: 6967344 (2005-11-01), Ovshinsky et al.
patent: 7057923 (2006-06-01), Furkay et al.
patent: 7214957 (2007-05-01), Ryoo et al.
patent: 7214958 (2007-05-01), Happ
patent: 7659534 (2010-02-01), Chen et al.
patent: 2006/0097240 (2006-05-01), Lowrey et al.
patent: 2006/0097343 (2006-05-01), Parkinson
patent: 2007/0057341 (2007-03-01), Pellizzer
patent: 2007/0096071 (2007-05-01), Kordus et al.
patent: 2007/0099405 (2007-05-01), Oliva et al.
K.N. Chen et al., Thermal Stress Evaluation of a PCRAM Material Ge2Sb2Te5, 21st IEEE Non-Volatile Semiconductor Memory Workshop, pp. 97-98 (2006).
Chen Kuan-Neng
Krusin-Elbaum Lia
Newns Dennis M.
Purushothaman Sampath
Alexanian Vazken
International Business Machines - Corporation
Michael J. Chang, LLC
Tran Minh-Loan T
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