Static information storage and retrieval – Read/write circuit – Including signal comparison
Patent
1989-08-14
1992-01-28
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Including signal comparison
365221, 377 34, 341 98, G11C 700, H03K 1302
Patent
active
050848410
ABSTRACT:
A FIFO 12 has a status flag generator 14. The status flag generator 14 includes a register programmable to "N". It also includes two sets of gray-code counters and a register (22,23,21;26,25,24) that are driven by separate READ and WRITE CLKS. The registers and counters are connected to comparators (31-36) for generating a plurality of signals that are input to output latches (41-43). The status flag generator is capable of generating status signals of FULL, HALF-FULL, EMPTY, FULL-N and EMPTY+N. N is a user-defined number that is programmed into a register 20 that is selectively connected to one or more of the programmable gray-code counters (23,24).
REFERENCES:
patent: 3588461 (1971-06-01), Halsall
patent: 4780894 (1988-10-01), Watkins et al.
patent: 4873666 (1989-10-01), Lefebvre et al.
Ward Morris D.
Williams Kenneth L.
Barndt B. Peter
Donaldson Richard L.
Popek Joseph A.
Texas Instruments Incorporated
LandOfFree
Programmable status flag generator FIFO using gray code does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Programmable status flag generator FIFO using gray code, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmable status flag generator FIFO using gray code will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1865132