Programmable single buffered six pass transistor configuration

Details Programmable single buffered six pass transistor configuration Programmable single buffered six pass transistor configuration

1995-10-16

1997-02-04

Hudspeth, David R.

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 41, 326 86, H03K 1901

Patent

active

056002645

ABSTRACT:
A programmable single buffered six transistor switch box is provided. A six transistor switch box acts as a programmable junction between four intersecting lines. The switch box allows any two of the lines to be programmably interconnected to form a signal channel. Alternatively, two sets of the four lines can also be programmably interconnected so that two signal channels are formed. The present invention modifies the known six transistor switch box so that one line output from the switch box can be programmably buffered. By buffering the output signal, delay introduced by resistance and capacitance of the transistors switch box is significantly reduced. For short line lengths, the buffer delay can be greater than the delay associated with the resistance and capacitance of the transistors of the switch box. In these cases, the output is not buffered and the buffer is programmably bypassed. Although there are four possible outputs that can be programmably selected in the present invention switch box, the present invention advantageously utilizes a single buffer resource to perform output buffering. A multiplexer circuit and demultiplexer circuit configuration is used to perform the proper routing.

REFERENCES:
patent: 4713557 (1987-12-01), Carter
patent: 4758746 (1988-07-01), Birkner et al.
patent: 5365125 (1994-11-01), Goetting et al.
patent: 5488316 (1996-01-01), Freeman et al.
patent: 5504440 (1996-04-01), Sasaki
patent: 5530814 (1996-06-01), Wong et al.

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