Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2006-03-31
2008-12-02
Perveen, Rehana (Department: 2116)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C331S176000
Reexamination Certificate
active
07461285
ABSTRACT:
A free running clock circuit includes a programmable resistor array including a plurality of resistors connected in series. A plurality of transistors are connected to the plurality of resistors wherein each of the plurality of resistors has one of the plurality of transistors associated therewith for connecting a resistor to the first programmable resistor and providing a resistance thereto. A transistor funnel limits leakage currents from a portion of the plurality of transistors to a single transistor of the transistor funnel.
REFERENCES:
patent: 3094654 (1963-06-01), Roelli
patent: 3156831 (1964-11-01), Baude
patent: 3317671 (1967-05-01), Mitchell et al.
patent: 4272840 (1981-06-01), Morozumi et al.
patent: 4295058 (1981-10-01), Lade et al.
patent: 5146107 (1992-09-01), Matsuoka et al.
Howison & Arnott , L.L.P.
Perveen Rehana
Silicon Laboratories Inc.
Stoynov Stefan
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