Programmable read-only memory device provided with test cells

Details Programmable read-only memory device provided with test cells Programmable read-only memory device provided with test cells

1984-10-30

1988-01-12

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Testing

371 21, 365105, 365 96, G11C 2900, G11C 700

Patent

active

047195991

ABSTRACT:
A programmable read-only memory device of a junction destruction type is provided with a test circuit for the purpose of detecting a parasitic thyristor effect which may occur in the data programming operation by the user. The test circuit includes first and second additional row lines, a first diode connected between the first additional row line and one column line, a second diode connected between the second additional row line and another column line adjacent to the one column line, and a transistor of a base-open type connected between the second additional row line and the one column line.

REFERENCES:
patent: 4320507 (1982-03-01), Fukushima et al.
patent: 4347584 (1982-08-01), Fukushima et al.

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