Programmable packer and unpacker with ditherer

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

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710 68, G06F 1340

Patent

active

060650842

ABSTRACT:
A programmable packer and unpacker with dither support is disclosed. In one embodiment of the invention, a packer packs a plurality of bits of a first bus to a lesser plurality of bits of a second bus according to one of a plurality of different packing modes. In another embodiment, an unpacker unpacks a plurality of bits of a first bus from a lesser plurality of bits of a second bus according to one of the plurality of different packing modes. The packer comprises a plurality of multiplexers and a microstore in an exemplary embodiment. The microstore controls the select bits for the plurality of multiplexers, and is programmed in accordance with one of the different packing modes. The multiplexers determine which bits from the input bus will be transferred to the output bus. Because the microstore can be reprogrammed, the packer is programmable and thus universal.

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