Programmable output buffer

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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Details

C326S033000, C326S034000, C326S026000

Reexamination Certificate

active

10832091

ABSTRACT:
A programmable output buffer providing variable drive strength and slew rate for a given noise limit that includes a driver stage that generates the output of the buffer and a plurality of selectively enabled switching elements, at least a predriver stage providing a plurality of selectable switching elements that enables the selected drive stage switching elements, and a selection means that enables the required predriver switching elements in the desired sequence to provide the desired drive strength and slew rate.

REFERENCES:
patent: 5898321 (1999-04-01), Ilkbahar et al.
patent: 6288563 (2001-09-01), Muljono et al.
patent: 6538464 (2003-03-01), Muljono et al.
patent: 6710617 (2004-03-01), Humphrey
patent: 6919738 (2005-07-01), Kushida

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