Programmable on-chip logic analyzer apparatus, systems, and...

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Reexamination Certificate

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C326S041000, C326S047000, C714S030000, C714S031000, C714S039000

Reexamination Certificate

active

07944234

ABSTRACT:
Apparatus, systems, and methods disclosed herein may cause an event trigger state machine associated with a programmable on-chip logic analyzer (POCLA) to transition to a programmable state at a programmable number of occurrences of a programmable set of events associated with a first subset of signals on a first subset of input signal paths. States associated with a second subset of signals on a second subset of input signal paths may be stored at a time relative to a transition to the programmable state if a set of storage criteria have been met. Additional embodiments are disclosed and claimed.

REFERENCES:
patent: 6725391 (2004-04-01), Swoboda
patent: 7325164 (2008-01-01), Swanson et al.
patent: 7332929 (2008-02-01), Normoyle et al.
patent: 7739097 (2010-06-01), Sample et al.

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