Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate
2006-10-10
2010-12-21
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Interface
Logic level shifting
C326S081000
Reexamination Certificate
active
07855574
ABSTRACT:
A level conversion architecture that accommodates signals traveling between logic blocks operating at corresponding voltage levels is provided. The architecture includes pass gates connected in series between the logic blocks. One of the gates of the pass gates is supplied with a selectable gate voltage supply. The selectable gate voltage supply is selected from a plurality of voltages based on a configuration random access memory (CRAM) setting. In one embodiment, a half latch is connected to one of the pass gates. In this embodiment, the half latch is part of a feedback loop to minimize power leakage of a logic element in one of the logic blocks. A method for managing power consumption and providing voltage level conversion between regions of an integrated circuit is also provided.
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Santurkar Vikram
Thiruveedhula Ravi
Yi Hyun
Altera Corporation
Hammond Crystal L
Martine & Penilla & Gencarella LLP
Tan Vibol
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