Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2007-05-22
2007-05-22
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S047000
Reexamination Certificate
active
10803030
ABSTRACT:
A microcontroller with a mixed analog/digital architecture including multiple digital programmable blocks and multiple analog programmable blocks in a communication array having a programmable interconnect structure. The single chip design is implemented by integration of programmable digital and analog circuit blocks that are able to communicate with each other. Robust analog and digital blocks that are flash memory programmable can be utilized to realize complex design applications that otherwise would require multiple chips and/or separate applications. The programmable chip architecture includes a novel array having programmable digital blocks that can communicate with programmable analog blocks using a programmable interconnect structure. The programmable analog array contains a complement of Continuous Time (CT) blocks and a complement of Switched Capacitor (SC) blocks that can communicate together. The analog blocks consist of multi-function circuits programmable for one or more different analog functions, and fixed function circuits programmable for a fixed function with variable parameters. The digital blocks include standard multi-function circuits and enhanced circuits having functions not included in the standard digital circuits. The programmable array is programmed by flash memory and programming allows dynamic reconfiguration. That is, “on-the-fly” reconfiguration of the programmable blocks is allowed. The programmable analog array with both Continuous Time analog blocks and Switched Capacitor analog blocks are offered on a single chip along with programmable digital blocks. The programmable interconnect structure provides for communication of input/output data between all analog and digital blocks.
REFERENCES:
patent: 5202687 (1993-04-01), Distinti
patent: 5426378 (1995-06-01), Ong
patent: 5703871 (1997-12-01), Pope et al.
patent: 5828693 (1998-10-01), Mays et al.
patent: 5880598 (1999-03-01), Duong
patent: 6018559 (2000-01-01), Azegami et al.
patent: 6144327 (2000-11-01), Distinti et al.
patent: 6304101 (2001-10-01), Nishihara
“Digital Configurable Macro Architecture”; U.S. Appl. No. 09/909,045, filed Jul. 18, 2001; W. Snyder.
“Configuring Digital Functions in a Digital Configurable Macro Architecture”; U.S. Appl. No. 09/909,109, filed Jul. 18, 2001; W. Snyder.
“A Programmable Analog System Architecture (as Amended)”; U.S. Appl. No. 09/909,047, filed Jul. 18, 2001; M. Mar.
“Programmable System on a Chip”; U.S. Appl. No. 10/033,027, filed Oct. 1, 2001; W. Snyder.
Mar Monte
Snyder Warren
Cypress Semiconductor Corporation
Tran Anh Q.
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