Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2002-03-06
2003-11-18
Le, Don (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S038000
Reexamination Certificate
active
06650140
ABSTRACT:
BACKGROUND OF THE INVENTION
High speed serial digital communication is constantly increasing in importance. The number of different industry standards for such communication is also increasing. Programmable logic device (“PLD”) technology is well known for its ability to allow one common hardware design (embodied in an integrated circuit) to be programmed to meet the needs of many different applications. PLDs with a given hardware design can be manufactured in large quantities at low cost. Each user then programs PLDs of that kind to meet that user's particular needs. The user does not have to do a custom integrated circuit design, with the attendant high cost, delay, and difficulty of revision if modifications are subsequently needed.
To facilitate the use of PLDs in applications involving high speed serial digital communication, it would be desirable to provide PLDs with high speed serial interface (“HSSI”) circuitry. One problem in doing this, however, is that there is now a large number of high speed serial (“HSS”) communication standards or somewhat related, but perhaps non-standard, protocols that users of PLDs may want to employ. Including a large number of different HSSI circuits on a PLD is wasteful, uneconomical, and very difficult or even impossible if the number of standards or protocols to be supported becomes very large. On the other hand, manufacturing the same basic PLD circuitry in several different versions, each with different HSSI circuitry to meet a different HSS standard or protocol, is also uneconomical because it is contrary to the “economy of scale”benefit otherwise associated with manufacturing one common PLD circuit design in large volume.
SUMMARY OF THE INVENTION
In accordance with the present invention, PLD circuitry includes at least some of the circuit components that are needed to provide several different HSSIs. These HSSI circuit components are hard-wired to at least a large extent, although in at least some cases at least some of their functions are either programmably controllable or controllable by dynamic signals (e.g., from the PLD core circuitry). Interconnections among the HSSI circuit components may also be programmably controllable or dynamically controllable. By making use of appropriate ones of the available HSSI circuit components (e.g., by programmable or dynamic selection), and by appropriately controlling (e.g., programmably or dynamically controlling) the selected HSSI circuit components, the circuitry can be made to perform according to any one of several possible HSS communication standards or other generally similar protocols. In some cases, some of the functions required to implement certain HSSIs may be wholly or partly performed by the PLD core circuitry. The HSSI circuit components that are provided may be for HSSI receiver circuitry, HSSI transmitter circuitry, or both.
Further features of the invention, its nature and various advantages will be more apparent from the accompanying drawings and the following detailed description.
REFERENCES:
patent: 3473160 (1969-10-01), Wahlstrom
patent: 4486739 (1984-12-01), Franaszek et al.
patent: 6240471 (2001-05-01), Schlueter et al.
patent: 6270350 (2001-08-01), Christopher
patent: 6370603 (2002-04-01), Silverman et al.
patent: 6388591 (2002-05-01), Ng
U.S. Ser. application No. 09/805,843, Aung et al., filed Mar. 13, 2001.
“Protocol Independent Gigabit Backplane Transceiver Using Lucent ORT4622/ORT8850 FPSCs”, Application Note, Jun. 2000, Lucent Technologies Inc., pp. 1-10.
“Lucent Introduces 10Gb/s Ethernet FPGAs”, Programmable Logic News and Views, Electronic Trend Publications, Inc., vol. IX, No. 11, Nov. 2000, pp. 7-8.
“ORCA ORT82G5 0.622/1.0-1.25/2.0-2.5/3.125 Gbits/s Backplane Interface FPSC”, Product Brief, Feb. 2001, Lucent Technologies Inc., pp. 1-8.
Virtex-II Pro Platform FPGA Handbook, UG012 (vl.0) Jan. 31, 2002, Xilinx, Inc., pp. 1-6, 27-32, 121-126, and 162-180.
Rocket I/O Transceiver User Guide, UG024 (vl.2) Feb. 25, 2002, Xilinx, Inc., pp. 1-106.
Asayesh Reza
Lee Chong H.
Altera Corporation
Fish & Neave
Jackson Robert R.
Le Don
LandOfFree
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