Programmable logic device with flexible memory allocation...

Details Programmable logic device with flexible memory allocation... Programmable logic device with flexible memory allocation...

2006-08-08

2006-08-08

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S038000, C326S039000

Reexamination Certificate

active

07088134

ABSTRACT:
A programmable logic device includes a plurality of logic blocks organized into a cluster. Each logic block may be configured into a logic mode and a memory mode. The logic blocks are arranged into at least one cluster, each cluster having a data bus configured to provide data words to logic blocks within its cluster.

REFERENCES:
patent: 6356110 (2002-03-01), Reddy et al.
“Introduction to ispMACH 5000 Family”, Oct. 2002, pp. 1-5, Lattice Semiconductor Corporation.
“Delta39K™ ISR™ CPLD Family”, Aug. 1, 2003, pp. 1-8, A-85-86. Document #: 38-03039 Rev. *H, Cypress Semiconductor Corporation.

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