Programmable logic device methods and system for providing...

Details Programmable logic device methods and system for providing... Programmable logic device methods and system for providing...

2006-06-06

2009-12-08

Le, Dieu-Minh (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S027000

Reexamination Certificate

active

07631223

ABSTRACT:
Various techniques are disclosed herein to provide an improved approach to the loading of configuration data into configuration memory of programmable logic devices. For example, in accordance with one embodiment of the present invention a method of configuring a programmable logic device includes reading a first bitstream from a first memory block of an external memory device. The first bitstream is checked for errors and a second bitstream is read from a second memory block of the external memory device if an error is detected. Configuration memory of the programmable logic device is programmed with configuration data provided in one of the first bitstream and the second bitstream.

REFERENCES:
patent: 5946219 (1999-08-01), Mason et al.
patent: 7088132 (2006-08-01), Tang et al.
patent: 7091745 (2006-08-01), Jacobson
patent: 7095247 (2006-08-01), Tang et al.
patent: 7265578 (2007-09-01), Tang et al.
patent: 7301822 (2007-11-01), Walstrum, Jr.
patent: 7358762 (2008-04-01), Walstrum et al.
patent: 7375549 (2008-05-01), Tang et al.
patent: 7378873 (2008-05-01), Tang et al.
patent: 7397274 (2008-07-01), Tang et al.
patent: 7495970 (2009-02-01), Tang et al.
patent: 2002/0080771 (2002-06-01), Krumel
patent: 2005/0237083 (2005-10-01), Bakker et al.
patent: 2007/0182445 (2007-08-01), Chen et al.
patent: 2007/0208926 (2007-09-01), Grieve et al.
Altera Corporation, Cyclone Device Handbook, vol. 1, 13. Configuring Cyclone FPGAs, Aug. 2005, 50 pages.
Lattice Semiconductor Corporation, Low-Cost FPGA Configuration Via Industry-Standard SPI Serial Flash, A Lattice Semiconductor White Paper, Jun. 2004, 13 pages.
Xilinx®, Configuring Spartan-3E Xininx FPGAs with SPI Flash Memories, Arthur Khu, Jan. 3, 2006, 16 pages.
ST Microelectronics, M25P80, 8 Mbit, Low Voltage, Serial Flash Memory With 40MHz SPI Bus Interface, Aug. 2004, 41 pages.

Affiliated with

Also associated with

Rating

Programmable logic device methods and system for providing... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Programmable logic device methods and system for providing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmable logic device methods and system for providing... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4113462