Electronic digital logic circuitry – Multifunctional or programmable – Sequential or with flip-flop
Reexamination Certificate
2006-08-08
2006-08-08
Chang, Daniel D. (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Sequential or with flip-flop
C326S038000, C326S040000
Reexamination Certificate
active
07088136
ABSTRACT:
Latch circuitry is provided for programmable logic regions on integrated circuits such as programmable logic device integrated circuits. A programmable logic device may have programmable logic regions based on programmable combinational logic circuits. Latch circuitry in a logic region may be provided between an output of a programmable combinational logic circuit in the logic region and an output of the logic region. When the latch circuitry is enabled, the latch circuitry performs the functions of a level-sensitive latch. When the latch circuitry is disabled, the latch circuitry acts as a passive data path. The passive data path may include only a single driver so that the latch circuitry adds essentially zero additional delay to the data produced by the combinational logic.
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“EPM5016 to EPM5192 High-Speed, High-Density MAX EPLDs” Data Sheet of Altera Corporation, Oct. 1990, ver. 1, pp. 115-121.
Altera Corporation
Chang Daniel D.
Treyz G. Victor
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