Programmable logic device adapted to enter a low-power mode

Details Programmable logic device adapted to enter a low-power mode Programmable logic device adapted to enter a low-power mode

2007-10-30

2009-11-10

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S039000, C326S047000

Reexamination Certificate

active

07616025

ABSTRACT:
A programmable logic integrated circuit device adapted to enter a low-power mode is described. The integrated circuit device includes a programmable logic block, a first low-power mode control circuit programmed into a portion of the programmable logic block, a second low-power mode control circuit, and a low-power enable input coupled to the first low-power mode control circuit and the second low-power mode control circuit. This arrangement allows the programmable logic integrated circuit device to transition into and out of low-power mode in response to a single signal from system control logic, so that the system control logic can be designed without detailed understanding of the inner workings of the programmable logic integrated circuit device or its programmed design.

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Examiner is notified of office communication (Mail date Oct. 28, 2008) associated with co-pending U.S. Appl. No. 11/838,827 entitled “Programmable Logic Device Adapted to enter a Low-Power Mode” filed Aug. 14, 2007 in which the above identified US Patents are cited.
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Copending U.S. Appl. No. 11/928,445 filed, Oct. 30, 2007 entitled Programmable Logic Device Adapted to Enter a Low-Power Mode.

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