Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement
Patent
1988-06-10
1990-03-27
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Including specified plural element logic arrangement
36523008, 307465, 34082583, G11C 700
Patent
active
049126776
ABSTRACT:
A programmable logic device includes an AND array; an OR array; a buffer circuit connected between the AND array and OR array; and a number of decoder arrangements operatively connected to the AND array and OR array. By constituting the buffer such that the AND array and OR array are electrically associated even in a write operation of data, namely, the buffer is brought to an enable state, a logic verify of the buffer becomes unnecessary and, accordingly, a verify/check of written data can be carried out both easily and efficiently.
REFERENCES:
patent: 4041459 (1977-08-01), Horninger
patent: 4488229 (1984-12-01), Harrison
patent: 4661922 (1987-04-01), Thierbach
patent: 4745579 (1988-05-01), Mead et al.
Itano Kiyoshi
Shimbayashi Kohji
Fujitsu Limited
Fujitsu VLSI Limited
Popek Joseph A.
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