Programmable logic cells with local connections

Details Programmable logic cells with local connections Programmable logic cells with local connections

2005-01-27

2009-10-20

Cho, James (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S047000

Reexamination Certificate

active

07605605

ABSTRACT:
A programmable logic structure is disclosed employing input logic routing cell (ILRC) multiplexers and output logic routing cell (OLRC) multiplexers for making local connections between dedicated logic cells. In a simple programmable logic structure, a dedicated logic cell (DLC) is implemented in a programmable logic structure comprising multiple ILRC multiplexers for port A and multiple OLRC multiplexers for port B. In a multi-level programmable logic structure, multiple columns of dedicated logic cells is designed with columns of dedicated local cells adjacent to each other where each DLC column is used to implement a particular logic function. In a first embodiment, local connections can be made between dedicated logic cells, e.g. an OLRC in a first DLC at level L making local point-to-point connections to an ILRC in a second DLC at level L+1. In a second embodiment, local connections can be made from any other dedicated logic cells, whether positioned horizontally or vertically relative to a relative point or multiplexer, and from any offset from a current logic and routing cell (LRC). In a third embodiment, local connections can be made by stitching a first OLRC to a second OLRC (for connecting to an ILRC), which allows lines from other columns or levels of DLC to reach an ILRC for a fast local interconnect.

REFERENCES:
patent: 5942914 (1999-08-01), Reddy et al.
patent: 6590417 (2003-07-01), Jones et al.
patent: 2004/0212393 (2004-10-01), Abramovici et al.
patent: 2006/0132176 (2006-06-01), Lewis

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