Programmable logic block providing carry chain with...

Details Programmable logic block providing carry chain with... Programmable logic block providing carry chain with...

2007-08-14

2007-08-14

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S037000, C326S038000, C326S039000, C326S040000, C326S047000, C326S093000

Reexamination Certificate

active

11151796

ABSTRACT:
A programmable logic block provides programmable initialization values for carry chains traversing the logic block, without consuming user logic resources. An exemplary programmable logic block includes two or more carry multiplexers coupled together to form a carry chain for the programmable logic block. A carry initialization circuit has an output terminal coupled to a data input terminal of a first carry multiplexer in the carry chain. The carry initialization circuit is controlled by configuration memory cells of the programmable logic block to select one of a carry in signal, a power high signal, a ground signal, and (optionally) a signal from an interconnect structure of the logic block. Thus, an initialization value (e.g., power high or ground) can be provided to the carry chain without consuming other programmable resources within the logic block.

REFERENCES:
patent: 5381058 (1995-01-01), Britton et al.
patent: 5546018 (1996-08-01), New et al.
patent: 5629886 (1997-05-01), New
patent: 5698992 (1997-12-01), El Ayat et al.
patent: 5761099 (1998-06-01), Pedersen
patent: 5801546 (1998-09-01), Pierce et al.
patent: 5850152 (1998-12-01), Cliff et al.
patent: 5889411 (1999-03-01), Chaudhary
patent: 5889413 (1999-03-01), Bauer
patent: 5907248 (1999-05-01), Bauer et al.
patent: 5914616 (1999-06-01), Young et al.
patent: 5920202 (1999-07-01), Young et al.
patent: 5942913 (1999-08-01), Young et al.
patent: 5963050 (1999-10-01), Young et al.
patent: 5986468 (1999-11-01), Chan et al.
patent: 6081914 (2000-06-01), Chaudhary
patent: 6086629 (2000-07-01), McGettigan et al.
patent: 6107822 (2000-08-01), Mendel et al.
patent: 6107827 (2000-08-01), Young et al.
patent: 6109827 (2000-08-01), Holloway, Jr.
patent: 6122720 (2000-09-01), Cliff
patent: 6124731 (2000-09-01), Young et al.
patent: 6154053 (2000-11-01), New
patent: 6157209 (2000-12-01), McGettigan
patent: 6184709 (2001-02-01), New
patent: 6184712 (2001-02-01), Wittig et al.
patent: 6201409 (2001-03-01), Jones et al.
patent: 6288570 (2001-09-01), New
patent: 6380759 (2002-04-01), Agrawal et al.
patent: 6396303 (2002-05-01), Young
patent: 6427156 (2002-07-01), Chapman et al.
patent: 6452834 (2002-09-01), Kengeri
patent: 6466052 (2002-10-01), Kaviani
patent: 6515506 (2003-02-01), Lo
patent: 6605959 (2003-08-01), Morse et al.
patent: 6621296 (2003-09-01), Carberry et al.
patent: 6646467 (2003-11-01), Cliff et al.
patent: 6708191 (2004-03-01), Chapman et al.
patent: 6747480 (2004-06-01), Kaptanoglu et al.
patent: 6829756 (2004-07-01), Trimberger
patent: 6828824 (2004-12-01), Betz et al.
patent: 6836147 (2004-12-01), Nakaya
patent: 6847228 (2005-01-01), Crotty et al.
patent: 6873181 (2005-03-01), Pedersen
patent: 6937064 (2005-08-01), Lewis et al.
patent: 6943580 (2005-09-01), Lewis et al.
patent: 7030652 (2006-04-01), Lewis et al.
patent: 7061268 (2006-06-01), Lee et al.
patent: 7111214 (2006-09-01), Chaudhary et al.
patent: 7138820 (2006-11-01), Goetting et al.
patent: 2001/0006347 (2001-07-01), Jefferson et al.
patent: 2001/0048320 (2001-12-01), Lee et al.
patent: 2001/0052793 (2001-12-01), Nakaya
patent: 2002/0057103 (2002-05-01), Ngai et al.
patent: 2003/0210073 (2003-11-01), Nagi et al.
patent: 2004/0178821 (2004-09-01), Bal et al.
patent: 2005/0038844 (2005-02-01), Langhammer et al.
patent: 2005/0093577 (2005-05-01), Nguyen et al.
patent: 2005/0127944 (2005-06-01), Lewis et al.
patent: 2005/0218929 (2005-10-01), Wang et al.
patent: 2005/0275428 (2005-12-01), Schlacter
patent: 2006/0164119 (2006-07-01), Nowak-Leijten
patent: 2006/0164120 (2006-07-01), Verma et al.
U.S. Appl. No. 11/151,819, filed Jun. 14, 2005, Young et al.
U.S. Appl. No. 11/151,892, filed Jun. 14, 2005, Young et al.
U.S. Appl. No. 11/151,915, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/151,938, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/151,939, filed Jun. 14, 2005, Chirania et al.
U.S. Appl. No. 11/151,986, filed Jun. 14, 2005, Simkins.
U.S. Appl. No. 11/151,987, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/151,988, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,010, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,012, filed Jun. 14, 2005, Pham et al.
U.S. Appl. No. 11/152,358, filed Jun. 14, 2005, Bauer et al.
U.S. Appl. No. 11/152,359, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,360, filed Jun. 14, 2005, Young et al.
U.S. Appl. No. 11/152,439, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,572, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,590, filed Jun. 14, 2005, Kondapalli et al.
U.S. Appl. No. 11/152,637, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,736, filed Jun. 14, 2005, Kondapalli et al.
U.S. Appl. No. 11/152,737, filed Jun. 14, 2005, Kondapalli et al.
U.S. Appl. No. 11/152,763, filed Jun. 14, 2005, Young.
Lucent Technologies; “Field Programmable Gate Arrays Data Book”; published Oct. 1996; pp. 2-9 through 2-28.
Altera Corporation; “Stratix Device Handbook; vol. 1”; “2. Stratix Architecture”; published Sep. 2004; pp. 2-1 through 2-20.
Xilinx, Inc.; “Virtex-II Platform FPGA Handbook”; published Dec. 2000; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 33-75.
Xilinx, Inc.; “Programmable Logic Data Book 2000”; Published Apr. 2000; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 3-75 through 3-96.
Xilinx, Inc.; “Virtex-II Pro Platform FPGA Handbook”; published Oct. 14, 2002; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 19-71.
Altera Corporation; “FLEX 10K Embedded Programmable Logic Family Data Sheet”; Digital Library 1996; pp. 31-53.
Xilinx, Inc.; “Programmable Logic Data Book 1996”; published Sep. 1996; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 4-5 through 4-45, 4-181 through 4-196, 4-253 through 4-264, and 4-289 through 4-302.
Xilinx, Inc.; “The Programmable Logic Data Book 1994”; published 1994; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 2-187 through 2-195.
Altera Corporation; “Stratix-II Device Handbook”; vol. I; published Mar. 2005; pp. 2-1 through 2-28.
Steven Elzinga et al.; “Design Tips for HDL Implementation of Arithmetic Functions”; XAPP 215 (v1.0); Jun. 28, 2000; available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 1-13.

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