Programmable logic block of FPGA using phase-change memory...

Details Programmable logic block of FPGA using phase-change memory... Programmable logic block of FPGA using phase-change memory...

2011-03-22

2011-03-22

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

C326S038000, C326S040000, C326S104000

Reexamination Certificate

active

07911227

ABSTRACT:
Provided is a programmable logic block of a field-programmable gate array (FPGA). The programmable logic block includes a pull-up access transistor connected to a power source, an up-phase-change memory device connected to the pull-up access transistor, a down-phase-change memory device connected to the up-phase-change memory device, an output terminal between the up-phase-change memory device and the down-phase-change memory device, and a pull-down access transistor connected to the down-phase-change memory device and a ground. The resistance values of the up-phase-change memory device and the down-phase-change memory device are individually programmed.

REFERENCES:
patent: 2006/0028247 (2006-02-01), Hara et al.
patent: 2006/0092691 (2006-05-01), Shiimoto et al.

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