Programmable logic array integrated circuit incorporating a firs

Details Programmable logic array integrated circuit incorporating a firs Programmable logic array integrated circuit incorporating a firs

1998-02-05

2000-10-17

Nguyen, Viet Q.

Static information storage and retrieval

Read/write circuit

Serial read/write

36518908, 326 37, 326 39, 326 41, 395500, G11C 700

Patent

active

061341665

ABSTRACT:
A programmable logic device integrated circuit incorporating a first-in, first-out memory block (250). First-in, first-out memory block (250) is coupled to a programmable interconnect array (213). Signals from the logic array blocks (LABs) (201) are connected to the control inputs of the first-in, first-out memory (250). In one embodiment, the programmable interconnect array (213) may be programmably coupled to the control inputs (259) of the first-in, first-out memory block. Status flag signals (276) from the first-in, first-out memory block (250) are programmably coupled to the programmable interconnect array (213). Data input (263) and data output (261) to first-in, first-out memory block (250) may be coupled to external, off-chip circuitry.

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