Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
Reexamination Certificate
2006-12-12
2009-11-03
Du, Thuan N (Department: 2116)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Multiple or variable intervals or frequencies
C713S401000, C716S030000, C327S172000
Reexamination Certificate
active
07613944
ABSTRACT:
A programmable local clock buffer for integrated circuit devices which is capable of varying initial settings is provided. The illustrative embodiments allow a single type of local clock buffer (LCB) to be used throughout an integrated circuit design while still being able to provide differing initial offsets and pulse widths for different local circuitry portions of the integrated circuit design. Delay circuit paths are provided, which provide discreet delay values, within the LCB that can be chained together when the LCB is instantiated to set the initial offset and pulse width values. When an LCB is instantiated in the integrated circuit device design, various ones of the delay circuit paths are connected together with the existing circuit paths of the LCB, i.e. the circuit paths that provide the pre-established offset and pulse width values, in order to set the initial offset and pulse width values for the LCB.
REFERENCES:
patent: 5956256 (1999-09-01), Rezek et al.
patent: 6107850 (2000-08-01), Shimizu
patent: 6288589 (2001-09-01), Potter et al.
patent: 6784709 (2004-08-01), Ryu
Chan Yuen H.
Lee Michael J.
Du Thuan N
Gerhardt Diana R.
International Business Machines - Corporation
Walder, Jr. Stephen J.
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