Programmable interconnect matrix architecture for complex progra

Details Programmable interconnect matrix architecture for complex progra Programmable interconnect matrix architecture for complex progra

1998-01-20

2000-10-24

Tokar, Michael

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 38, 326 41, H03K 19173, H03K 19177

Patent

active

061373087

ABSTRACT:
Routing an input signal to an output of a programmable interconnect matrix is accomplished via multi-level routing architecture. The routing may include selecting the input signal from a number of input signals at a first level of the routing architecture to provide an intermediate signal. The intermediate signal may then be selected at a second level of the routing architecture to provide the output signal. Selecting the input signal and/or the intermediate signal may be accomplished by programming one or more mutliplexers. In a further embodiment, the method includes dividing a plurality of input signals into segments, each segment including a number of the plurality input signals. From the segments, at least one of the input signals may be selected to produce the intermediate signal. Further still, a method of interconnecting signals by coupling an input of a connection circuit of a programmable logic device to an output thereof through a multi-level routing architecture within the connection circuit is provided. The coupling may be accomplished by first coupling the input to a first intermediate signal path at a first level of the multi-level routing architecture and then coupling the intermediate signal path to the output at a second level of the multi-level routing architecture. In each case, the coupling may be accomplished by appropriate selection using one or more multiplexers at the various levels of the multi-level routing architecture.

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patent: 5521529 (1996-05-01), Agrawal et al.
patent: 5818254 (1998-10-01), Agrawal et al.

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