Programmable interconnect architecture

Details Programmable interconnect architecture Programmable interconnect architecture

1988-05-18

1989-10-10

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307468, 34082584, H03K 19094

Patent

active

048734594

ABSTRACT:
A user-programmable interconnect architecture, which may be used for logic arrays for digital and analog system design, is disclosed. In one embodiment, a plurality of logic cells or modules in a matrix are connected by vertical and horizontal wiring channels. The wiring channels may in turn be programmed by the user to interconnect the various logic cells to implement the required logic function. The wiring channels comprise wiring segements connected by normally open programmable elements situated at the intersection of any two segments to be connected. Sensing circuitry and wiring may be included to allow 100% observability of internal circuit nodes, such as module outputs, from an external pad interface. A universal function module may be configured to implement the popular logic functions and has a physical layout which is conducive to custom circuit design.

REFERENCES:
patent: 4642487 (1987-02-01), Carter
patent: 4670749 (1987-06-01), Freeman
patent: 4691161 (1987-09-01), Kant et al.
patent: 4749947 (1988-06-01), Gheewala
patent: 4786904 (1988-11-01), Graham, III et al.
Askin et al, "PLA with Segmented Lines for Faster Signal Propagation", IBM T.D.B., vol. 24, No. 7B, Dec. 1981, p. 3898.

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