Programmable integrated circuit providing efficient...

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Reexamination Certificate

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C326S039000, C326S041000

Reexamination Certificate

active

11152010

ABSTRACT:
Efficient implementations of wide logic functions (e.g., priority encoders, AND gates, OR gates) in programmable ICs include carry chain multiplexers driven by dual-output programmable function generators. A function generator having two output signals is programmed to generate first and second function output signals. The first and second functions can optionally share some or all of the input signals. The first function output signal drives the select terminal of a carry multiplexer, which selects between a carry in input signal and the second function output signal to provide the carry out output signal. The wide function result is provided by the final carry multiplexer in a chain of such carry multiplexers. In an exemplary wide AND gate, the first function is an AND function, and the second function is ground. In an exemplary wide OR gate, the first function is a NOR function, and the second function is power high VDD.

REFERENCES:
patent: 5889411 (1999-03-01), Chaudhary
patent: 5889413 (1999-03-01), Bauer
patent: 5914616 (1999-06-01), Young et al.
patent: 5920202 (1999-07-01), Young et al.
patent: 5963050 (1999-10-01), Young et al.
patent: 6081914 (2000-06-01), Chaudhary
patent: 6118298 (2000-09-01), Bauer et al.
patent: 6118300 (2000-09-01), Wittig et al.
patent: 6150838 (2000-11-01), Wittig et al.
patent: 6184712 (2001-02-01), Wittig et al.
patent: 6208163 (2001-03-01), Wittig et al.
patent: 6288568 (2001-09-01), Bauer et al.
patent: 6288570 (2001-09-01), New
patent: 6297665 (2001-10-01), Bauer et al.
patent: 6323682 (2001-11-01), Bauer et al.
patent: 6373279 (2002-04-01), Bauer et al.
patent: 6388466 (2002-05-01), Wittig et al.
patent: 6396302 (2002-05-01), New et al.
patent: 6400180 (2002-06-01), Wittig et al.
patent: 6501296 (2002-12-01), Wittig et al.
patent: 2005/0275428 (2005-12-01), Schlacter
U.S. Appl. No. 10/859,836, filed Jun. 2, 2004, Chirania et al.
U.S. Appl. No. 10/863,989, filed Jun. 8, 2004, Young et al.
U.S. Appl. No. 10/864,024, filed Jun. 8, 2004, Young et al.
U.S. Appl. No. 10/864,244, filed Jun. 8, 2004, Young et al.
U.S. Appl. No. 11/151,796, filed Jun. 14, 2005, Young et al.
U.S. Appl. No. 11/151,819, filed Jun. 14, 2005, Young et al.
U.S. Appl. No. 11/151,892, filed Jun. 14, 2005, Young et al.
U.S. Appl. No. 11/151,915, filed Jun. 14, 2005, Young et al.
U.S. Appl. No. 11/151,938, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/151,939, filed Jun. 14, 2005, Chirania et al.
U.S. Appl. No. 11/151,986, filed Jun. 14, 2005, Simkins.
U.S. Appl. No. 11/151,987, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/151,988, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,012, filed Jun. 14, 2005, Pham et al.
U.S. Appl. No. 11/152,358, filed Jun. 14, 2005, Bauer et al.
U.S. Appl. No. 11/152,359, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,360, filed Jun. 14, 2005, Young et al.
U.S. Appl. No. 11/152,439, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,572, filed Jun. 14, 2005, Young.
U.S. Appl. No. 11/152,590, filed Jun. 14, 2005, Kondapalli et al.
U.S. Appl. No. 11/152,637, filed Jun. 14, 2005, Young.
U.S. Appl. No.11/152,736, filed Jun. 14, 2005, Kondapalli et al.
U.S. Appl. No. 11/152,737, filed Jun. 14, 2005, Kondapalli et al.
U.S. Appl. No. 11/152,763, filed Jun. 14, 2005, Young.
Lucent Technologies; “Field Programmable Gate Arrays Data Book”; published Oct. 1996; pp. 2-9 through 2-28.
Altera Corporation; “Stratix Device Handbook; vol. 1”; “2. Stratix Architecture”; published Sep. 2004; pp. 2-1 through 2-20.
Xilinx, Inc.; “Virtex-II Platform FPGA Handbook”; published Dec. 2000; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 33-75.
Xilinx, Inc.; “Programmable Logic Data Book 2000”; Published Apr. 2000; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 3-75 through 3-96.
Xilinx, Inc.; “Virtex-II Pro Platform FPGA Handbook”; published Oct. 14, 2002; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 19-71.
Altera Corporation; “FLEX 10K Embedded Programmable Logic Family Data Sheet”; Digital Library 1996; pp. 31-53, no month.
Xilinx, Inc.; “Programmable Logic Data Book 1996”; published Sep. 1996; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 4-5 through 4-45, 4-181 through 4-196, 4-253 through 4-264, and 4-289 through 4-302.
Xilinx, Inc.; “The Programmable Logic Data Book 1994”; published 1994; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 2-187 through 2-195, no month.
Steven Elzinga et al.; Application Note: Virtex Series; “Design Tips for HDL Implementation of Arthmetic Functions”; XAPP215, V1.0; Jun. 28, 2000; available from Xilinx, Inc. 2100 Logic Drive, San Jose, California 95124; pp. 1-13.
Altera Corporation; “Stratix-II Device Handbook”; vol. I; pubished Mar. 2005; pp. 2-1 through 2-28.

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