Programmable input/output block

Details Programmable input/output block Programmable input/output block

2005-08-16

2005-08-16

Le, Don (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S046000, C326S093000

Reexamination Certificate

active

06930509

ABSTRACT:
A programmable flip-flop is presented for outputting data. The flip-flop includes a first latch for latching a first input value in response to a rising edge of a clock signal. A second latch latches a second input value in response to a falling edge of the clock signal. A selection function controlled by the clock signal selectively supplies outputs of the first and second latches to the input of a third latch. A control circuit for the third latch accepts as inputs the clock signal and an inverted clock signal. The programmable flip-flop is configurable to operate in at least first and second modes selectable by the selection function and third latch control circuit, such that in the first mode the output of the third latch is the first and second input values multiplexed together and output at twice the clock rate. Alternatively, in the second mode one of the first and second latches is disconnected from the third latch such that the programmable flip-flop operates as a single edge-triggered register clocking out one of the first and second input values from the third latch.

REFERENCES:
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patent: WO 02/056515 (2002-07-01), None
European Search Report, EP 02 25 6804, dated Mar. 21, 2003.

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