Programmable impedance device

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185030, C365S185010

Reexamination Certificate

active

06456529

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to the field of integrated circuits, and more specifically to techniques and devices for programmable impedance.
The age of information and electronic commerce has been made possible by the development of semiconductor technology and integrated circuits. Integrated circuits are sometimes referred to as “chips.” Integrated circuits have been widely adopted and are used in many products in the areas of computers and other programmed machines, consumer electronics, telecommunications and networking equipment, industrial automation, and medical instruments, just to name a few. Integrated circuits are the foundation of the internet and other on-line technologies including the World Wide Web (WWW).
There is a continuing demand for electronic products that are easier to use, more accessible to greater numbers of users, provide more features, and generally address the needs of consumers and customers. Integrated circuit technology continues to advance rapidly. With new advances in technology, more of these needs are addressed. Furthermore, new advances may also bring about fundamental changes in technology that profoundly impact and greatly enhance the products of the future.
The building blocks of an integrated circuit are electrical and electronic elements. These elements include transistors, diodes, resistors, and capacitors. There may be many numbers of these elements on a single integrated circuit. Improvements in the electrical elements and the development of new types of electrical elements will enhance the performance, functionality, and size of the integrated circuit. As an example, a basic electrical property used in an integrated circuit is resistance (also known as “impedance”). In fact, the operation of every integrated circuit is affected to some extent by on-chip electrical resistance. Resistors and other resistive elements are used in the implementation of many circuits on an integrated circuit.
As can be appreciated, there is a need to provide techniques and devices for implementing a programmable impedance device.
SUMMARY OF THE INVENTION
The present invention provides techniques and devices for implementing a programmable impedance element. An impedance of the programmable impedance element is adjusted by appropriately configuring the element. The programmable impedance element has a range of impedance values, and is configurable to be a value within this range.
In an embodiment, the programmable impedance element includes a floating gate memory cell and a programmable impedance device. The floating gate memory cell is programmed by hot electrons or Fowler-Nordheim tunneling, which adjusts threshold voltages of the memory cell and the programmable impedance device. The impedance of the programmable impedance device is directly related to a programmed threshold voltage of the floating gate memory cell. The programmable impedance device is nonvolatile, and retains its value indefinitely.
The floating gate memory cell may be an EEPROM or Flash transistor. The memory cell and programmable impedance device may be n-channel or p-channel devices. Furthermore, they may be both the same device type, or different device types. In an implementation, a control gate may be shared between the memory cell and programmable impedance device. In other configurations, there may be two independent control gates. In further configurations, the memory cell may have a control gate, and the resistor element does not have a control gate. A floating gate may be shared between the memory cell and programmable impedance device.
Various techniques may be used to configure the programmable impedance element. For example, the memory cell may be programmed by applying a range of programming voltages VPP to a control gate. Another technique is to apply a varying number of pulses of a particular VPP voltage. These pulses may be applied to the control gate or the bit line of the memory device. Erase by Fowler-Nordheim tunneling can also be used to adjust the threshold voltage.
Another aspect of the present invention is the use of a multilevel memory cell to form a programmable impedance device. The programmable impedance device of the present invention may be coupled in series or parallel, and combinations of these, to form a programmable impedance network.
In another embodiment, the present invention is a circuit including a memory device coupled between a bit line and a source line. A programmable impedance device is coupled to the memory device, where an impedance between a first terminal and a second terminal of the programmable impedance device is configurable to be one of at least three different values depending on a configured state of the memory device. Moreover, a relationship between the level of the programming voltage applied to the memory device during programming and the corresponding programmed threshold voltage of the memory device is approximately linear.
In a further embodiment, the present invention is a programmable impedance element including a memory cell comprising a floating gate, where the memory cell is configurable to have more than two threshold voltages. A programmable impedance device has a floating gate shared with the floating gate of the memory cell, where an impedance of the programmable impedance device is based on a threshold voltage of the memory cell. The threshold voltage of the memory cell may be adjusted by varying a number of pulses of a programming voltage applied at a control gate or bit line of the memory cell. Alternatively, the threshold voltage of the memory cell may be adjusted by varying the magnitude of the programming voltage applied to the control gate of the memory cell.
A still further aspect of the present invention is a method of selecting a value of an impedance on an integrated circuit. A programming voltage is applied to a floating gate memory device. The floating gate memory device is configured to have a programmed threshold voltage that is a value between a first threshold voltage and a second threshold voltage, inclusive. An impedance value is obtained for a programmable impedance device, coupled to the floating gate memory device, based on the threshold voltage of the floating gate memory device.


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