Programmable impedance control circuit calibrated at Voh,...

Details Programmable impedance control circuit calibrated at Voh,... Programmable impedance control circuit calibrated at Voh,...

2007-12-25

2007-12-25

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S031000

Reexamination Certificate

active

11436260

ABSTRACT:
A method and apparatus are provided for a programmable impedance control circuit. In one example of the apparatus, a programmable impedance control circuit of an output driver of an input/output interface is provided. The programmable impedance control circuit includes a pull-up impedance programmed according to a multi-stage emulator and a pull-down impedance programmed according to the multi-stage emulator. The multi-stage emulator includes a first stage for calibrating a pull-up PMOS impedance at a voltage level Voh, a second stage for calibrating a pull-up NMOS impedance at a voltage level Vol, a third stage for calibrating a pull-down NMOS impedance at the voltage level Vol, a fourth stage for re-calibrating the pull-up NMOS impedance at the voltage level Vol, and fifth stage for calibrating a pull-down PMOS impedance at the voltage level Voh.

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