Programmable I/O cell capable of holding its state in...

Details Programmable I/O cell capable of holding its state in... Programmable I/O cell capable of holding its state in...

2008-05-13

2011-10-18

Wang, Albert (Department: 2115)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C327S143000, C327S198000, C713S320000

Reexamination Certificate

active

08041975

ABSTRACT:
The present invention comprises a microcontroller unit including a processor for generating a power down signal. Control logic generates a hold signal responsive to the power down signal. A voltage regulator provides a regulated voltage responsive to an input voltage and powers down responsive to the power down signal. At least one digital device powered by the regulated voltage enters a powered down mode responsive to the voltage regulator entering the powered down state. The at least one digital device provides at least one digital output signal that is provided to an input/output cell. The input/output cell also is connected to receive a hold signal. The input/output cell maintains a last state of the digital output signal responsive to the hold signal when the at least one digital device enters the powered down state.

REFERENCES:
patent: 6753698 (2004-06-01), Carpenter et al.
patent: 6882200 (2005-04-01), Ahsanullah et al.
patent: 7161386 (2007-01-01), Takiba et al.
patent: 2006/0290404 (2006-12-01), Law

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