Programmable hex-ROM with isolation transistor structure

Details Programmable hex-ROM with isolation transistor structure Programmable hex-ROM with isolation transistor structure

1997-03-26

1998-06-30

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

365104, 257401, 257394, H01L 2978, G11C 1700

Patent

active

057738670

ABSTRACT:
A ROM (read only memory) is disclosed. For via-ROMs, an isolation transistor is used to isolate adjacent pairs of memory devices instead of the more conventional field oxide isolation. The gate of the isolation transistor is grounded, insuring that conduction does not take place. For a GASAD ROM, a field oxide isolation is used.

REFERENCES:
patent: 4193125 (1980-03-01), Yoshiaki
patent: 5245212 (1993-09-01), Gill
patent: 5422844 (1995-06-01), Wolstenholme
Patent Abstracts of Japan, vol. 8, No. 217 (E-270), 4 Oct. 1984 and JP-A-59 103352 (Oki Denki Kogyo KK), 14 Jun. 1984. Abstract Only.
Patent Abstract of Japan vol. 9, No. 110 (E-314), 15 May 1985 and JP-A-60 001863 (Nippon Denki KK), 8 Jan. 1985. Abstract Only.
Semiconductor Memories, Betty Prince, Texas Instruments, USA, pp. 512-513.
The Design and Analysis of VLSI Circuits, Lance A. Glasser and Daniel W. Dobberpuhl pp. 382-383.
Novel Circuits for High Speed ROM's Tegze P. Haraszti, Member, IEEE, 1984.
A 65 mW 128K EG-ROM, Kazuhide Kiuchi, Nobuaki Ieda, Ken Takeya, and Tatsuo Babo, IEEE 1979.
A 256 kbit ROM with Serial ROM Cell Structure, Roger Cuppens and L. H. M. Sevat, IEEE 1983.

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