Programmable gate array for relay ladder logic

Electronic digital logic circuitry – Multifunctional or programmable – Array

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326 39, H03K 19177

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active

057317127

ABSTRACT:
An architecture is provided for field programmable gate army (FPGA) devices which implement relay ladder logic in PLC systems. Once the device is programmed, the implemented logic is executed in rung parallel fashion at electronic speeds. A direct correspondence of these devices in detail to relay ladder logic assures that technology mapping software for the FPGA device will run sufficiently fast for use in PLC systems. A reversible device programming method is required, so that the device can be reprogrammed conveniently to different relay ladder models. The architecture scales to families of devices of differing sizes and resources. A basic relay ladder logic is implemented, which supports various relay ladder logic dialects.

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