Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent
1995-07-27
1996-10-29
Westin, Edward P.
Electronic digital logic circuitry
Multifunctional or programmable
Array
326 44, 326 38, H03K 19173, H03K 19094
Patent
active
055700390
ABSTRACT:
A field programmable gate array (FPGA) includes at least one programmable function unit (PFU) which comprises input lines, output lines, and a look-up table (LUT) for generating various functions in response to a configuration bit stream. A first function is an adder/subtracter in which the first input line provides an add/subtract control signal to a multiplexer coupled to a full-adder. The multiplexer determines whether a data bit or its complement is coupled to the full-adder. A second function is an AND gate coupled to the full-adder in which the first input line provides a data bit to the AND gate. The second function provides a basic cell for a parallel multiplier. Furthermore, the first input line may be used as a control line or a data line for a general logic function, depending on the PFU function.
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Hamacher et al, Computer Organization, published by McGraw-Hill, 1978, pp. 194-195.
Oswald William A.
Singh Satwant
Fox James H.
Lucent Technologies - Inc.
Roseen Richard
Westin Edward P.
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