Programmable FIFO memory scheme

Details Programmable FIFO memory scheme Programmable FIFO memory scheme

1999-01-20

2001-05-15

Nguyen, Than (Department: 2759)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S102000, C711S005000, C711S109000, C711S110000, C710S052000, C710S056000, C710S057000

Reexamination Certificate

active

06233651

ABSTRACT:

The present invention relates to a first in first out (FIFO) memory devices and more particularly to a method and apparatus for altering the boundaries of sections of a memory device whereby data is stored in a FIFO structure.
One use of the FIFO memory devices is in the field of computer networks where each port of the network has associated with it a section of memory. Customarily, the amount of memory associated with each port is fixed and the total amount is also shared in a fixed relationship between transmission and reception.
This can result in large amounts of memory being required which is inefficient and leads to undue expense.
The present invention proposes to provide programmable delimiters for a FIFO based memory device in order to determine flexibly the total amount of memory allocated to a port as well as the amount of memory allocated for transmission separately from the amount of memory allocated for reception at that port.


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