Programmable event engine

Details Programmable event engine Programmable event engine

2002-03-28

2003-11-25

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C703S017000

Reexamination Certificate

active

06654934

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of logic analyzers and emulators. Specifically, the present invention relates to a programmable event engine that is re-configurable to execute a number of states in an event thread.
BACKGROUND ART
Logic analyzers and in-circuit emulators have been used for many years by software and hardware developers to help diagnose and debug hardware and software. Such devices may be able to monitor and analyze various circuit and software conditions during debugging and testing of the design. For example, they may store trace information, such as time stamps, register values, data memory content, etc., which may be later analyzed. They may also provide various configurable breakpoints, which allow the designer to analyze the state of the design at a point in its operation by stopping operation when a specified condition occurs. The breakpoints may also be chained together such that a series of conditions happen before the operation is stopped.
For example, conventional logic analyzers and in-circuit-emulators may have a relatively small number of configurable complex breakpoints. A designer may program between one and a few of these breakpoints to cause the analyzing device to perform a specified action upon a condition's occurrence. For example, a first breakpoint might be programmed to look for a write to a certain memory address. When the first breakpoint triggers, it activates a second complex breakpoint, which may look for a certain program counter value. When the program counter reaches that value, a third complex breakpoint is activated, which may watch for a certain stack pointer value. When the stack pointer reaches the specified value, a fourth complex breakpoint is activated, which may watch for a certain accumulator value. Finally, when the accumulator value is reached the operation breaks.
Unfortunately, conventional analyzing devices offer only a few breakpoints, which are implemented as dedicated pieces of hardware, each looking for one condition. Because much of the hardware is dedicated to one function, it is prohibitively expensive to provide a substantial number of breakpoints. Consequently, only a limited number of events can be programmed and only a limited number of conditions can be monitored.
Furthermore, conventionally, separate systems are required to perform both logic analyzer and in-circuit-emulation functions. For example, conventional logic analyzers are able to monitor signals that an in-circuit-emulator would not normally analyze, such as signals that originate outside the circuit containing the emulator. Likewise, a logic analyzer would not normally provide emulation functionality. Consequently, substantial added expensive must be taken to purchase and maintain both systems.
Therefore, it would be advantageous to provide a device that may be used to analyze electronic circuits and software, that is relatively inexpensive, and can track a substantial number of conditions occurring during operation of an electronic circuit or software. It would also be advantageous to provide an analyzing device that is less hardware intensive than conventional analyzing devices, such as logic analyzers and emulators.
SUMMARY OF THE INVENTION
The present invention provides a cost efficient device that may be used to analyze a circuit or software under test. The present invention provides a solution that is less custom hardware intensive than conventional solutions and can track a substantial number of conditions occurring during operation of an electronic circuit or software. The present invention provides these advantages and others not specifically mentioned above but described in the sections to follow.
A device for executing an event thread is disclosed. The device has programmable logic for storing data to define a number of states in an event thread to be executed in the event engine. The device also has execution logic coupled to the programmable logic. The execution logic is configurable to execute the current state and re-configurable to execute the next state, in response to data from the programmable logic. In this fashion, the next state may be executed by re-configuring the execution logic. The device also has transition logic coupled to the programmable logic. The transition logic causes the next state in the event thread to be entered by loading new data from the programmable logic. Therefore, the execution logic is re-configurable during execution of the event thread.
Another embodiment provides for a method of executing an event thread. First, data defining a thread having a number of states is received. The data is stored in a memory array in a thread engine. Logic in the thread engine is configured to execute a first state of the thread by using first data from the memory array. A first state in the thread is executed by the logic. Then, the logic in the thread engine is re-configured to execute a second state by using second data from the memory array. Then, the second state in the thread is executed. Additional states are then executed by re-configuring the logic with additional data from the memory array to execute the event thread.


REFERENCES:
patent: 5594741 (1997-01-01), Kinzelman et al.
patent: 6466898 (2002-10-01), Chan

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