Programmable erasure and programming time for a flash memory

Details Programmable erasure and programming time for a flash memory Programmable erasure and programming time for a flash memory

1995-05-31

1997-04-15

Dinh, Son T.

Static information storage and retrieval

Floating gate

Particular biasing

36518514, 36518522, 365218, 365236, G11C 700

Patent

active

056216874

ABSTRACT:
A method for controlling the programming and erasure time of a nonvolatile memory array in a memory device. A first value is defined, the first value representing a predetermined number of times a program or erase operation is to be reinitiated on the memory array. A write state machine of the memory device then initiates a program or erase operation on the nonvolatile memory array. The nonvolatile memory array is subsequently verified to determine if the program or erase operation was successful. If unsuccessful, the program or erase operation is repeated either until successful, or until the operation is repeated the predetermined number of times.

REFERENCES:
patent: 5297096 (1994-03-01), Terada et al.
patent: 5335198 (1994-08-01), Van Buskirk et al.
patent: 5343434 (1994-08-01), Noguchi

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