Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2005-11-08
2005-11-08
Chang, Daniel D. (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S086000, C327S321000
Reexamination Certificate
active
06963219
ABSTRACT:
A configurable low voltage differential signal (LVDS) system is located on a chip, such as a programmable logic device. The configurable LVDS system includes a pair of I/O pads, an LVDS transmitter for driving a differential output signal onto the I/O pads, an LVDS receiver for receiving a differential input signal from the I/O pads, and a termination resistor coupled across the pair of I/O pads, wherein the termination resistance can be enabled for use with either the LVDS transmitter or the LVDS receiver. Control circuitry is provided to control the selective enabling and disabling of the LVDS transmitter, the LVDS receiver and the termination resistance. This control circuitry can be configured in response to configuration data values stored on the chip.
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patent: 6765829 (2004-07-01), Graf et al.
Ghia Atul V.
Sodha Ketan
Cartier Lois D.
Chang Daniel D.
Hoffman E. Eric
Maunu LeRoy D.
Xilinx , Inc.
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