Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1999-11-30
2003-02-11
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
06519753
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a programmable device, such as a field programmable gate array, and in particular to a programmable device with a portion that is programmed with a standard circuit design configured by the manufacturer.
BACKGROUND
Programmable devices, such as programmable logic arrays or field programmable gate arrays, are well known in the art. These devices offer high performance and flexibility of design for the user. Programmable devices typically consist of many repeated portions or “macrocells,” which include modules of logic elements and programmable interconnect structures. The logic elements and programmable interconnect structures may be programmed to be interconnected in various configurations as desired by the user. Thus, the user can program the device with a desired circuit design.
FIG. 1
shows a simplified view of a conventional programmable device
10
.
Programmable device
10
is shown with five rows and five columns of logic elements, referred to herein as logic cells
12
, and a plurality of interconnecting routing resources
14
, shown schematically as lines. Of course, conventional programmable devices typically have many more logic cells than shown in
FIG. 1. A
plurality of input/output (“I/O”) pins
16
are also shown in FIG.
1
. Routing resources
14
are connected with programmable antifuses (not shown) that may be programmed to interconnect particular logic cells
12
and I/O pins
16
in various configurations as desired by the user.
To configure a programmable device, the user configures the interconnect structures, i.e., routing resources
14
and antifuses (not shown) so that selected input terminals and selected output terminals of selected on-chip circuit components, i.e., logic cells
12
, are electrically connected together in such a way that the resulting circuit is the specific circuit desired by the user. In a programmable device employing, for example, amorphous silicon antifuses, selected amorphous silicon antifuses disposed between selected wire segments are “programmed” to connect the selected wire segments together electrically. Which antifuses are programmed and which antifuses are left unprogrammed determines how the circuit components are interconnected and therefore determines the resulting circuit.
A field programmable gate array (an “FPGA”) is one type of programmable device. For background information on field programmable gate arrays that employ antifuses, see: “Field Programmable Gate Array Technology” edited by Stephen Trimberger, 1994, pages 1-14 and 98-170; “Field-Programmable Gate Arrays” by Stephen Brown et al., 1992, pages 1-43 and 88-202; “Practical Design Using Programmable Logic” by David Pellerin and Michael Holley, 1991, pages 84-98; the 1995 QuickLogic Data Book, 1995, pages 1-5 through 2-11 and 6-3 through 6-18; the 1998 QuickLogic Data Book, 1998, pages 1-5 through 2-16; the 1995 Actel FPGA Data Book and Design Guide, 1995, pages ix-xv, 1-5 through 1-34, 1-51 through 1-101, 1-153 through 1-22, 3-1 through 4-56; U.S. Pat. No. 5,424,655 entitled “Programmable Application Specific Integrated Circuit Employing Antifuses and Methods Therefor”. The contents of these documents are incorporated herein by reference.
Conventionally, when a user desires a specific device, the user must design the entire desired circuit. Once the desired circuit is designed, the programmable device is programmed accordingly.
Often there are certain elements within a user's design that are functionally similar to elements in other user's designs. This is true even if the different user's circuits function differently. Thus, in a conventional programmable device users are required to design and program standard aspects of their desired circuits.
Unfortunately, these standard elements may have complex timing and routing criteria making the design of these standard elements very difficult. Consequently, the user may spend an inordinate amount of time attempting to design a standard element in the user's circuit design. Further, because a programmable device cannot be unprogrammed, if the user makes a mistake in configuring a standard element, the programmable device may be programmed with a bad design and wasted.
Thus, what is needed is a programmable device that is embedded with a standard circuit design so the user does not need to design and program that element of the design.
SUMMARY
A programmable device, in accordance with an embodiment of the present invention, includes a main field that is programmable by the user and at least one embedded portion that is reserved to be programmed with a standard circuit design, which is configured, e.g., by the manufacturer. The embedded portion of the programmable device is structurally similar to the main field, i.e., it has the same or similar programmable structure. However, the embedded portion is not accessible to be programmed by the user. In some embodiments, the embedded portion may be pre-programmed with the standard circuit design and in other embodiments the embedded portion is automatically programmed when the user programs the main field.
The programmable device may also include signature bits that are used by the programming unit to identify the programmable device as having the embedded portion and the particular standard circuit design that is or will be programmed into the embedded portion. The signature bits may be programmed after the manufacture of the programmable device or may be hard wired during the manufacture of the device. When the user programs the programmable device, the programming unit recognizes the configuration of the signature bits and restricts access to embedded portion based on the configuration.
With an embedded portion programmed with a standard circuit design, there is no need for the user to design that element. Thus, the user's design is simplified and the risk of waste is reduced.
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patent: 5526276 (1996-06-01), Cox et al.
patent: 5544070 (1996-08-01), Cox et al.
patent: 5552720 (1996-09-01), Lulla et al.
patent: 5661412 (1997-08-01), Chawla et al.
patent: 5687325 (1997-11-01), Chang
patent: 5729468 (1998-03-01), Cox
patent: 6044453 (2000-03-01), Paver
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“Field Programmable Gate Array Technology” pp. 1-14 and 98-170 edited by Stephen Trimberger, 1994.
Field-Programmable Gate Arrays by Stephen Brown et al., 1992, pp. 1-43 and 88-202.
Practical Design Using Programmable Logic by David Pellerin and Michael Holley, 1991, pp. 84-98.
1995 QuickLogicData Book, 1995, pp. 1-5 through 2-11 and 6-3 through 6-18.
1998 QuickLogic Data Book, 1998, pp. 1-5 through 2-16.
1995 Actel FPGA Data Book and Design Guide pp. ix-xv, 1-5 through 1-34, 1-51 through 1-101, 1-153 through 1-22, 3-1 through 4-56.
Ahuja Atul
Ang Roger
Borkovic Drazen
Chan Andrew K.
Lulla Mukesh T.
Do Thuan
Klivans Norman R.
QuickLogic Corporation
Skjerven Morrill LLP
Smith Matthew
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