Programmable controller including instruction decoder for...

Details Programmable controller including instruction decoder for... Programmable controller including instruction decoder for...

2000-11-29

2004-10-26

Tsai, Henry W. H. (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Processing sequence control

C712S248000

Reexamination Certificate

active

06810477

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a programmable controller. More specifically, this invention relates to an arithmetic circuit which processes a sequence program with high speed in a programmable controller.
BACKGROUND ART
A conventional programmable controller will be explained with reference to FIG.
21
.
FIG. 21
shows a structure of the programmable controller disclosed in Japanese Patent Laid-open Publication No. HEI 5-204416. This programmable controller has a sequence program memory
100
which stores a sequence program therein, an arithmetic circuit
101
for the sequence program, a data memory
102
which stores arithmetic data therein, and a microprocessor
103
which processes an instruction which cannot be executed in the arithmetic circuit
101
.
The arithmetic circuit
101
has an instruction decode section
104
, a conductive
on-conductive information storage section
105
, an arithmetic data storage section
106
, an arithmetic section
107
, an address generation section
108
and a control section
109
. The instruction decode section
104
decodes instruction codes of the sequence program stored in the sequence program memory
100
. The conductive
on-conductive information storage section
105
stores a state of a contact point of the last sequence program. The arithmetic data storage section
106
temporarily stores data to be operated. The arithmetic section
107
executes a bit process and a word process
11
according to contents of the instruction codes. The address generation section
108
generates an address for the data memory
102
. The control section
109
make controls when the arithmetic data are read from the data memory
102
into the arithmetic circuit
101
and an arithmetic result of the arithmetic section
107
is written into the data memory
102
and the
1
.
15
conductive
on-conductive information storage section
105
.
Operation of the arithmetic circuit
101
will now be explained. When an instruction which can be processed in the arithmetic circuit
101
is executed, and if the instruction decode section
104
recognizes that data read from the sequence program memory
100
are the instruction which can be processed in the arithmetic circuit
101
, the arithmetic section
107
executes an arithmetic process according to the decoded content, and the arithmetic result is stored in the conductive
on-conductive information storage section
105
or the data memory
102
. The data to be operated at this time include the data read from the data memory
102
into the arithmetic data storage section
106
, the data stored in the conductive
on-conductive information storage section
105
and the data stored in respective registers in the arithmetic circuit
101
. When the arithmetic result is stored in the conductive
on-conductive storage section
105
, the data in the data memory
102
are held as conductive
on-conductive information, and the next instruction uses the conductive
on-conductive information. Meanwhile, when the arithmetic result is stored in the data memory
102
, when the conductive
on-conductive information becomes conductive, the arithmetic result in the arithmetic section
107
is held in the data memory
102
.
Operation, when an instruction which cannot be executed in the arithmetic circuit
101
, will now be explained. When the instruction decode section
104
recognizes the instruction which cannot be processed in the arithmetic circuit
101
, the instruction decode section
104
actuates the microprocessor
103
. When the microprocessor
103
is actuated, the microprocessor
103
reads the arithmetic data from the data memory
102
and executes arithmetic, and writes the arithmetic result into the conductive
on-conductive information storage section
105
or the data memory
102
. Moreover, as for an instruction which is operated after judging as to whether or not it is executed at the last scanning, or an instruction which is operated after judging a state of an applicable bit in the data memory
102
at the last execution, the last execution
on-execution information is stored in an applicable bit in the sequence program, for example, and the process of the instruction is completed.
Operation of the conventional programmable controller when it executes the sequence program concretely shown in
FIG. 22
will now be explained. In
FIG. 22
,
110
is an instruction (symbol) for storing a state of bit data X
0
stored in the data memory
102
into the conductive
on-conductive information storage section
105
.
111
is an instruction (symbol) for storing AND of a state of bit data X
1
stored in the data memory
102
and conductive
on-conductive information about a contact point stored in the conductive
on-conductive information storage section
105
by an instruction
110
into the conductive
on-conductive information storage section
105
.
112
is an instruction (symbol) for obtaining AND of a compared result of the work data D
0
and D
1
stored in the data memory
102
and the conductive
on-conductive information stored by the instruction
110
so as to store the AND into the conductive
on-conductive information storage section
105
.
113
is an instruction (symbol) for transmitting word data D
2
stored in the data memory
102
as a content of D
3
when the last data in the conductive
on-conductive information storage section
105
are ON and not transmitting D
2
when the last data are OFF.
114
is an instruction (symbol) for storing an added result of word data D
4
and D
5
stored in the data memory
102
as a content of D
6
when the last data in the conductive
on-conductive information storage section
105
are ON, and not storing the added result when the last data are OFF.
Instructions
110
to
114
shown in
FIG. 22
are stored in the sequence program memory
100
as instruction codes in order, and they are read into the instruction decode section
104
in order. When the instruction
110
is fetched, the control section
109
reads an input device stored in the data memory
102
into the arithmetic data storage section
106
, and the arithmetic section
107
bit-extracts an ON/OFF state of X
0
and stores it into the conductive
on-conductive information storage section
105
.
When the instruction
111
is fetched, the control section
109
reads an input device stored in the data memory
102
into the arithmetic data storage section
106
, and the arithmetic section
107
bit-extracts the ON/OFF state of X
0
so as to store AND of the bit-extracted result and data in the conductive
on-conductive information storage section
105
as conductive
on-conductive information.
When the instruction
112
is fetched, the instruction decode section
104
discriminates that the instruction
112
cannot be executed in the arithmetic section
107
. The microprocessor
103
is actuated so as to obtain AND of the compared result of the word data D
0
and D
1
stored in the data memory
102
and the conductive
on-conductive information stored by the instruction
111
and store the AND into the conductive
on-conductive information storage section
105
. When the instruction
113
is fetched, the control section
109
reads D
2
and D
3
from the data memory
102
, and writes the content of D
2
into D
3
when the conductive
on-conductive information is ON and writes the read content of D
3
directly into D
3
when the conductive
on-conductive information is OFF.
When the instruction
114
is fetched, the instruction decode section
104
recognizes that the instruction
114
cannot be executed in the arithmetic circuit
101
. The microprocessor
103
is actuated so as to add D
4
and D
5
when the conductive
on-conductive information is ON and write the added result into D
6
, and so as not to add D
4
and D
5
when the conductive
on-conductive information is OFF.
In the conventional programmable controller, since the instructions are always discriminated regardless of the state of the conductive
on-conductive information, the instruction processing cycle becomes uniform regar

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