Static information storage and retrieval – Read/write circuit – Including signal comparison
Reexamination Certificate
2002-02-19
2004-09-14
Tran, M. (Department: 2818)
Static information storage and retrieval
Read/write circuit
Including signal comparison
C365S203000
Reexamination Certificate
active
06791885
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to integrated memory circuits. More specifically, it relates to a method for sensing the content of a programmable conductor random access memory (PCRAM) cell.
2. Description of Prior Art
DRAM integrated circuit arrays have existed for more than thirty years and their dramatic increase in storage capacity has been achieved through advances in semiconductor fabrication technology and circuit design technology. The tremendous advances in these two technologies have also achieved higher and higher levels of integration that permit dramatic reductions in memory array size and cost, as well as increased process yield.
A DRAM memory cell typically comprises, as basic components, an access transistor (switch) and a capacitor for storing a binary data bit in the form of a charge. Typically, a charge of one polarity is stored on the capacitor to represent a logic HIGH (e.g., binary “1”), and a stored charge of the opposite polarity represents a logic LOW (e.g., binary “0”). The basic drawback of a DRAM is that the charge on the capacitor eventually leaks away and therefore provisions must be made to “refresh” the capacitor charge or else the data bit stored by the memory cell is lost.
The memory cell of a conventional SRAM, on the other hand, comprises, as basic components, an access transistor or transistors and a memory element in the form of two or more integrated circuit devices interconnected to function as a bistable latch. An example of such a bistable latch is cross-coupled inverters. Bistable latches do not need to be “refreshed,” as in the case of DRAM memory cells, and will reliably store a data bit indefinitely as long as they continue to receive supply voltage.
Efforts continue to identify other forms of non-volatile or semi-volatile memory elements. Recent studies have focused on resistive materials that can be programmed to exhibit either high or low stable ohmic states. A programmable resistance element of such material could be programmed (set) to a high resistive state to store, for example, a binary “1” data bit or programmed to a low resistive state to store a binary “0” data bit. The stored data bit could then be retrieved by detecting the magnitude of a readout current switched through the resistive memory element by an access device, thus indicating the stable resistance state it had previously been programmed to.
Recently programmable conductor memory elements have been devised. For example, chalcogenide glasses which have switchable resistive states have been investigated as data storage memory cells for use in memory devices, such as DRAM memory devices. U.S. Pat. Nos. 5,761,115, 5,896,312, 5,914,893, and 6,084,796 all describe this technology and are incorporated herein by reference. One characteristic of a programmable conductor memory element such as one formed of the chalcogenide glasses described above is that it typically includes chalcogenide glass which can be doped with metal ions and a cathode and anode spaced apart on one or more surfaces of the glass. The doped glass has a normal and stable high resistance state. Application of a voltage across the cathode and anode causes a stable low resistance path to occur in the glass. Thus, stable low and high resistance states can be used to store binary data.
A programmable conductor memory element formed of a doped chalcogenide glass material typically has a stable high resistance state which may be programmed to a low resistance state by applying a voltage across the memory element. To restore the memory cell to a high resistive state, typically one needs to program the cell with a negative, or inverse voltage which is equal to or greater that the voltage used to program the memory element to the low resistance state. One particularly promising programmable conductor chalcogenide glass has a Ge:Se glass composition and is doped with silver.
Suitable circuitry for reading data from an array of programmable conductor memory elements has not yet been fully developed. Accordingly, in order to realize a functional programmable conductor memory, appropriate read circuitry is required to nondestructively sense data stored in the memory elements of the array.
SUMMARY OF THE INVENTION
A sense circuit for reading a resistance level of a programmable conductor random access memory (PCRAM) cell is provided. A voltage potential difference is introduced across a PCRAM cell by activating an access transistor from a raised rowline voltage. Both a digit line and a digit complement reference line are precharged to a first predetermined voltage. The cell being sensed has the precharged voltage discharged through the resistance of the programmable conductor memory element of the PCRAM cell. A comparison is made of the voltage read at the digit line and at the reference conductor. If the voltage at the digit line is greater than the reference voltage, the cell is read as a high resistance value (e.g., logic HIGH); however, if the voltage measured at the digit line is lower than that of the reference voltage, the cell is read as a low resistance value (e.g., logic LOW). In an additional aspect of the invention, in order to rewrite a logic “HIGH” into the cell, the rowline associated with the cell being sensed may be raised to a higher voltage after the cell is sensed.
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pat
Casper Stephen L.
Duesman Kevin
Hush Glen
Dickstein , Shapiro, Morin & Oshinsky, LLP
Micro)n Technology, Inc.
Tran M.
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