Programmable clock network for distributing clock signals to...

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis

Reexamination Certificate

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C326S039000, C326S093000

Reexamination Certificate

active

06996736

ABSTRACT:
A clock network for an integrated circuits includes a first set of lines configured to distribute clock signals to a first section of the integrated circuit. The clock network also includes a second set of lines configured to distribute clock signals to a second section of the integrated circuit separately from the first section of the integrated circuit.

REFERENCES:
patent: 4912342 (1990-03-01), Wong et al.
patent: 5686844 (1997-11-01), Hull et al.
patent: 5712579 (1998-01-01), Duong et al.
patent: 5744991 (1998-04-01), Jefferson et al.
patent: 6127865 (2000-10-01), Jefferson
patent: 6191609 (2001-02-01), Chan et al.
patent: 6249149 (2001-06-01), Pedersen

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