Programmable buffer circuit and a mask ROM device having the sam

Electronic digital logic circuitry – Multifunctional or programmable – Field-effect transistor

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326 87, 326 57, G06F 738

Patent

active

06107828&

ABSTRACT:
A programmable buffer circuit comprises a logical gate circuit having a second input terminal, a third input terminal and a first output terminal, and a first input terminal. The second input terminal is connected to the first input terminal. Further, a selective signal generating circuit for supplying two kinds of selective signals in logical level to the third input terminal is provided. A tri-state inverter circuit having a fourth input terminal and a second output terminal is provided and a tri-state buffer circuit having a fifth input terminal and a third output terminal is provided. The fourth input terminal and the fifth input terminal are connected to the first output terminal. A fourth output terminal is connected to the second output terminal and the third output terminal.

REFERENCES:
patent: 4612459 (1986-09-01), Pollachek
patent: 4823309 (1989-04-01), Kusaka et al.
patent: 5751165 (1998-05-01), Yoeli et al.

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