Programmable boosting and charge neutralization

Details Programmable boosting and charge neutralization Programmable boosting and charge neutralization

2007-10-30

2007-10-30

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S236000

Reexamination Certificate

active

11285903

ABSTRACT:
A programmable capacitance circuit including an input node; an output node; and a plurality of capacitance stages. Each of the capacitance stages is coupled to the input node and the output node, and wherein each capacitance stage is configured to be switched into a circuit path between the input node and the output node. Each of the capacitance stages includes a capacitor, and a control transistor having a gate capacitance in series with the capacitor, wherein the gate capacitance is configured to be added to the capacitance of the capacitor between the input node and the output node.

REFERENCES:
patent: 5796647 (1998-08-01), Iizuka et al.
patent: 6853231 (2005-02-01), Millar
patent: 6982582 (2006-01-01), Cheng

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