Programmable array-based bus arbiter

Details Programmable array-based bus arbiter Programmable array-based bus arbiter

2005-12-20

2005-12-20

Dang, Khanh (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

C710S113000, C710S107000, C710S240000, C710S241000

Reexamination Certificate

active

06978329

ABSTRACT:
A bus arbiter for arbitrating bus access requests from N bus requestor devices. The bus arbiter comprises N one-hot registers, each one-hot register associated with a corresponding bus requester device. Each one-hot register contains N priority bits rank-ordered from a lowest priority bit to a highest priority bit. Only one priority bit is enabled to indicate a priority of the corresponding bus requester device. The bus arbiter compares the priority bits in each one-hot register with a plurality of request signals received from the bus requester devices and grants bus access to the highest priority bus requester device.

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